Quantum computing is transitioning from small noisy prototypes toward architectures capable of fault-tolerant operation. Current research focuses on scaling systems, improving coherence and control, and implementing quantum error correction (QEC) with concrete codes and fault-tolerant gate sets. The central questions are how to realize scalable hardware, how to map algorithms efficiently to specific platforms, and how to meet the thresholds required for error-corrected computation.

This course covers the physical operation of quantum processors, the algorithmic landscape that motivates fault tolerance, and the hardware–software stack linking control, readout, and characterization. Emphasis is on superconducting qubits, which short comparisons to other platforms (e.g., neutral atoms, trapped ions, spin qubits).

Topics covered:

* Qubits and quantum gates (physical principles).

* Quantum algorithms: from core protocols (teleportation, Grover, QFT) to hardware-aware mappings.

* Quantum error correction and fault tolerance (codes, decoding, thresholds, logical operations).

* Superconducting quantum circuits (qubits: transmons, fluxoniums, couplers).

* Control and readout of superconducting qubits.

* Characterization of qubits, gates, and processors.

* Overview and comparison with other platforms (trapped ions, spin qubits).